1. Field of the Invention
The present invention relates to a multilayered semiconductor device in which a second semiconductor package is stacked on a first semiconductor package, a printed circuit board including a multilayered semiconductor device, and a method of manufacturing a multilayered semiconductor device.
2. Description of the Related Art
As electronic equipment such as a portable information device, a digital still camera, or a digital video camera becomes smaller and more sophisticated in functionality, a semiconductor device is required to be more densified and miniaturized. In order to respond to these demands, a multilayered semiconductor device is under development.
As a multilayered semiconductor device, there is a multi chip package (MCP) type multilayered semiconductor device in which multiple semiconductor elements are stacked. However, it is difficult to conduct a performance test with regard to a single semiconductor element, and thus, until the MCP type multilayered semiconductor device is completed, whether the multiple semiconductor elements operate or not cannot be found out. The yield of the completed MCP type multilayered semiconductor device is the product of the yields of the respective semiconductor elements, and thus, is significantly reduced. Further, as the number of the semiconductor elements to be stacked increases, the yield is reduced more.
On the other hand, a performance test of a semiconductor element is easy under a state in which the semiconductor element is contained in a semiconductor package, and thus, in order to manufacture a multilayered semiconductor device with an enhanced yield, it is desired to stack semiconductor packages whose performance tests have been conducted and whose nondefectiveness is guaranteed.
Accordingly, as a multilayered semiconductor device, a package in package (PiP) type multilayered semiconductor device has been developed (see Japanese Patent No. 4594777). In a multilayered semiconductor device of this kind, a second semiconductor package which is encapsulated in a resin is stacked on a first semiconductor package, and the second semiconductor package is, together with a semiconductor element in the first semiconductor package, encapsulated in another resin. A wiring board of the first semiconductor package and a wiring board of the second semiconductor package are connected via metal wires.
The thickness of the encapsulating resin in the PiP type multilayered semiconductor device proposed in the above-mentioned Japanese Patent No. 4594777 is larger than the thickness of the encapsulating resin in an MCP type multilayered semiconductor device in which multiple semiconductor elements are stacked. For example, the thickness of the multiple semiconductor elements in an MCP type multilayered semiconductor device is about 50 μm to 100 μm, while the thickness of the second semiconductor package in a PiP type multilayered semiconductor device is 500 μm or more. Therefore, in a PiP type multilayered semiconductor device, the ratio of the volume of the encapsulating resin including the encapsulating resin of the second semiconductor package to the volume of the multilayered semiconductor device is considerably large.
By the way, a semiconductor element is formed of a semiconductor such as Si. On the other hand, a wiring board of a semiconductor package which is electrically connected to a semiconductor element is formed of an organic material having a linear expansion coefficient larger than that of the semiconductor element and copper foil as a wiring layer.
Therefore, generally, as a material of the encapsulating resin, a material having a linear expansion coefficient close to that of the semiconductor element is selected to reduce the inconsistency in linear expansion coefficient between the semiconductor element and the wiring board and to protect the electrically connecting portion between the semiconductor element and the wiring board. Therefore, compared with a case of an MCP type multilayered semiconductor device, thermal expansion in a PiP type multilayered semiconductor device is considerably small.
A multilayered semiconductor device as described above is, in electronic equipment such as a portable information device, a digital still camera, or a digital video camera, electrically connected to a main board which is a printed wiring board via a solder ball as an external connection terminal. The main board is formed of a glass epoxy resin (13 to 40 ppm) having a linear expansion coefficient larger than those of a semiconductor element and an encapsulating resin of the multilayered semiconductor device and copper foil as wiring (15 to 20 ppm). In the case where the temperature in the electronic equipment rises due to a use environment or heat generation when an electronic component or a semiconductor device in the electronic equipment operates, the multilayered semiconductor device and the main board thermally expand.
However, in a PiP type multilayered semiconductor device, the ratio of the volume of the encapsulating resin to the volume of the entire multilayered semiconductor device is considerably larger than that in an MCP type multilayered semiconductor device. Further, the linear expansion coefficient of the encapsulating resin is considerably smaller than that of the main board, and thus, thermal expansion of the PiP type multilayered semiconductor device is smaller than thermal expansion of the main board.
Therefore, when the multilayered semiconductor device and the main board thermally expand, the amount of displacement of a connecting surface between the external connection terminal such as a solder ball and the wiring board is smaller than the amount of displacement of a connecting surface between the external connection terminal and the main board. Due to the difference in the amounts of displacement, a large distortion occurs in the external connection terminal such as a solder ball, and the distortion is accumulated in the external connection terminal as metal fatigue.
As the electronic equipment is repeatedly operated, distortion also occurs repeatedly, and metal fatigue is accumulated in the external connection terminal, which finally results in fracture of the external connection terminal. In particular, an external connection terminal located in a corner of the multilayered semiconductor device is farthest from the center of the multilayered semiconductor device, and thus, the amount of displacement between the multilayered semiconductor device and the main board is the largest, which causes the distortion to be the largest. As a result, the external connection terminal located in a corner of the multilayered semiconductor device is likely to fracture first among all the external connection terminals between the multilayered semiconductor device and the main board.
As described above, a PiP type multilayered semiconductor device having a structure in which a semiconductor package encapsulated in an encapsulating resin having a linear expansion coefficient is small is further encapsulated in another encapsulating resin has a problem that the reliability of the connection of the multilayered semiconductor device after being connected to the main board is low.